Logic Analyser Model

The VSM logic analyser models a basic 24-channel digital logic analyser.

The main features of the model are as follows:
  8 single bit traces and two 8-bit bus traces.
  10,000 x 24-bit capture buffer.
  Capture resolution from 200us per sample to 0.5ns per sample with corresponding capture times from 2s to 5ms.
  Display zoom range from 1000 samples per division to 1 sample per division.
  Triggering on ANDed combination of input states and/or edges, and bus values.
  Trigger positions at 0, 25, 50, 75 and 100% of the capture buffer allows for display of pre- and post-trigger data.
  Two cursors provided for taking accurate timing measurements.
 

Animated VSM Logic Analyser
VSM Logic Analyser in operation.